Advanced Computer Architecture
SS 2007 Prof. Dr. A. Strey Universität InnsbruckNews
The first exam will be on July 12, 11:00-13:00 in HS D. No resources are allowed.
Contents
This lecture presents an overview of architectural concepts that can be found in modern computer systems, e.g.:
- Pipelining
- Instruction-Level Parallelism (ILP)
- Thread-Level Parallelism (TLP)
- Data-Level Parallelism (DLP)
- Branch Prediction
- Vector Prcessors
- Interconnection networks
- Multiprocessors
Literature
J.L. Hennessy, D.A. Patterson: Computer Architecture - A Quantitative Approach, 4th edition, Academic Press, 2006
Exercises
Sheet 1 (blatt1.pdf), sheet 2 (blatt2.pdf), sheet 3 (blatt3.pdf), sheet 4 (blatt4.pdf)
Homeworks
M. Egger, M. Piff: The MIPS R4000 microproprocessor CPU pipeline
R. Spindler: Limitations of ILP
Ch. Hellwig: Power4 microachitecture (Slides)
P. Thoman, D. Thöni: AMD 3DNow
R. Plattner, M. Thaler: AltiVec (Slides)
M. Janetschek: Vektor-Supercomputer SX-8 (Slides)
Ph. Glatzl: Graphic Processing Unit (Slides)
E. Blaas, M. Oberberger, E. Zemmer: FPGA (Slides)
Slides
The slides of the lecture are available for download (color pdf, 4 slides per page):
| Overview | ACAoverview4.pdf |
| Chapter 1: Introduction | ACAintro4.pdf |
| Chapter 2: Instruction Set architectures | ACAisa4.pdf |
| Chapter 3: Pipelining, Part A | ACApipeline4.pdf |
| Chapter 3: Pipelining, Part B | ACApipelineB4.pdf |
| Chapter 4: Instruction Level Parallelism, Part A | ACAilpA4.pdf |
| Chapter 4: Instruction Level Parallelism, Part B | ACAilpB4.pdf |
| Chapter 4: Instruction Level Parallelism, Part C | ACAilpC4.pdf |
| Chapter 5: Data Level Parallelism | ACAsimd4.pdf |
| Chapter 6: Thread Level Parallelism, Part A | ACAthreadsA4.pdf |
| Chapter 6. Thread Level Parallelism, Part B | ACAthreadsB4.pdf |
| Chapter 7: Vector Processors | ACAvector4.pdf |
| Chapter 8: Distributed shared memory | ACAdmc4.pdf |